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[SourceCodeSDR-SDRAM-vhdl

Description: SDR-SDRAM-vhdl单个SDRAM的控制,通过它可以学习了解SDRAM的时序等,很有帮助哦 !
Platform: | Size: 717771 | Author: zsy5460 | Hits:

[VHDL-FPGA-Verilogref-ddr-sdram-vhdl

Description: 用VHDL编写DDR SDRAM Controller的源代码- Compiles DDR SDRAM Controller with VHDL the source code
Platform: | Size: 1031168 | Author: 包盛花 | Hits:

[VHDL-FPGA-Verilogref-sdr-sdram-vhdl

Description: DDR控制器的VHDL源代码.采用FPGA实现DDR接口控制器,适用于Altera的FPGA,最高频率可到100M-DDR controller VHDL source code. Using FPGA DDR interface controller, applicable to Altera FPGA, the highest frequency available 100M
Platform: | Size: 776192 | Author: 张涛 | Hits:

[VHDL-FPGA-Verilogsdr sdram controller

Description: ALTERA sdram vhdl与verilog参考设计-Altera SDRAM VHDL and Verilog reference design
Platform: | Size: 2458624 | Author: 陈东平 | Hits:

[Otherref-ddr-sdram-vhdl

Description: 本程序是DDR SDRAM控制器的VHDL程序,由ALTERA 提供-this procedure is DDR SDRAM controller VHDL procedures provided by Altera
Platform: | Size: 437248 | Author: kevin | Hits:

[DocumentsSDRAM-VHDL

Description: SDRAM控制器的VHDL实现,pdf格式,有需要多的,联系我-SDRAM controller VHDL, pdf format, it needs more, Contact
Platform: | Size: 124928 | Author: | Hits:

[Otherref-sdr-sdram-vhdl

Description: FPGA连接SDRAM的源程序,VHDL语言实现,功能基本完全。应用效果好。-FPGA connected SDRAM source, VHDL language, the basic function fully. Application effective.
Platform: | Size: 732160 | Author: young | Hits:

[VHDL-FPGA-VerilogSDRAM

Description: 基于FPGA的SDRAM控制器的设计和实现,还比较好勒.-FPGA-based SDRAM controller design and realization, but also better le.
Platform: | Size: 69632 | Author: rubyshirial | Hits:

[VHDL-FPGA-Verilogref-sdr-sdram-vhdl

Description: 标准SDR SDRAM控制器参考设计_verilog_lattice\sdr_ctrl.v-Standard SDR SDRAM Controller Reference Design _verilog_latticesdr_ctrl.v
Platform: | Size: 776192 | Author: 王廷龙 | Hits:

[VHDL-FPGA-Verilogsdram

Description: sdram test controller altera -sdram test controller altera
Platform: | Size: 1519616 | Author: yangchun | Hits:

[VHDL-FPGA-Verilogref-sdr-sdram-verilog

Description: SDRAM的vegilog代码,做一个SDRAM的封装成为SRAM一样进行操作。一个顶层文件下由三个模块-SDRAM
Platform: | Size: 717824 | Author: 吴厚航 | Hits:

[VHDL-FPGA-Verilog(fpga)sdram

Description: verilog 代码,读写SDRAM 不带仿真,需要自己编写测试文件-Verilog code, read and write SDRAM simulation without the need to prepare their own test documentation
Platform: | Size: 19935232 | Author: ch | Hits:

[VHDL-FPGA-Verilogref-ddr-sdram-vhdl

Description: 基于VHDL编写的DDR-SDRAM控制器的编程,目前是业界常用的RAM控制器-VHDL prepared based on the DDR-SDRAM controller programming, is currently the industry s commonly used RAM controller
Platform: | Size: 1031168 | Author: wfs | Hits:

[VHDL-FPGA-Verilogref-sdr-sdram-vhdl

Description: 基于VHDL编写的SDR-SDRAM控制器的编程,目前是业界常用的RAM控制器-VHDL prepared based on the SDR-SDRAM controller programming, is now commonly used in industry RAM controller
Platform: | Size: 1013760 | Author: wfs | Hits:

[ARM-PowerPC-ColdFire-MIPSsdram

Description: artera 的一个SDRAM 模型(verilog)-artera an SDRAM model [verilog]
Platform: | Size: 4096 | Author: xiaoheng | Hits:

[VHDL-FPGA-VerilogAlteraSDR-SDRAM

Description: Altera 官方提供的SDRAM控制器,verilog的-SDRAM controller provided by Altera in Verilog HDL
Platform: | Size: 811008 | Author: machenghai | Hits:

[SCMsource_code

Description: 一些源程序,主要包括CAN总线驱动、sdram VHDL实现、ucos2的移植、SDIO驱动、tcpip的实现、usb控制器代码、基于FPGA的雷达目标模拟器等-Some source code, including CAN bus driver, sdram VHDL implementation, ucos2 transplant, SDIO drivers, tcpip of implementation, usb controller code, based on the FPGA, such as radar target simulator
Platform: | Size: 6898688 | Author: | Hits:

[VHDL-FPGA-VerilogSDRAM

Description: 这个是一个基于FPGA的SDRAM控制器系统,实现对SDRAM的读写操作,用来实现时序的控制-This is an FPGA-based SDRAM controller system, the read and write operations to SDRAM to achieve the control of timing
Platform: | Size: 2171904 | Author: jyb | Hits:

[VHDL-FPGA-VerilogSDRAM

Description: 瑞芯科技EFX400SL开发板上使用ISE创建的SDRAM控制器的工程源码-Rockchip EFX400SL technology development board created by the use of ISE projects SDRAM controller source
Platform: | Size: 13446144 | Author: 曹晶 | Hits:

[VHDL-FPGA-Verilogddr-sdram

Description: DDR SDRAM控制器verilog代码及中文说明文档,对DDR开发很有用的哈。-Verilog source code for DDR SDRAM controler design,including guide book in chinese.
Platform: | Size: 923648 | Author: runxin | Hits:
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